`timescale 1ns / 1ps
`include "defines.vh"
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2024/06/13 21:41:37
// Design Name: 
// Module Name: MEM_WB
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module MEM_WB(
    input [0:0] clk,
    input [0:0] rst,

    input [0:0] Write_Reg_Flag_Input,  //寄存器写标志
    input [`Reg_Addr_Bus] Write_Reg_Addr_Input, //寄存器写地址
    input [`Reg_Data_Bus] Write_Reg_Data_Input, //寄存器写值


    output [0:0] Write_Reg_Flag_Output,  //寄存器写标志
    output [`Reg_Addr_Bus] Write_Reg_Addr_Output, //寄存器写地址
    output [`Reg_Data_Bus] Write_Reg_Data_Output, //寄存器写值

    // 数据冒险 前递操作
    // 将写入寄存器标志，写入寄存器地址 ，ALU结果前递给ID_EX
    output [0:0] Write_Reg_Flag_Forward_Output,
    output [`Reg_Addr_Bus] Write_Reg_Addr_Forward_Output,
    output [`Reg_Data_Bus] Write_Reg_Data_Forward_Output
    );

    Latch #(1) Latch_MEM_WB_Write_Reg_Flag(.clk(clk), .rst(rst), .Clear_Flag(Clear_Flag_Input), .Default_Value(`Regs_Rst_Flag_Disabled), 
    .Write_Input(Write_Reg_Flag_Input), .Read_Output(Write_Reg_Flag_Output));
    
    Latch #(32) Latch_MEM_WB_Write_Reg_Addr(.clk(clk), .rst(rst), .Clear_Flag(Clear_Flag_Input), .Default_Value(`Regs_Addr_Rst), 
    .Write_Input(Write_Reg_Addr_Input), .Read_Output(Write_Reg_Addr_Output));

    Latch #(32) Latch_MEM_WB_Write_Reg_Data(.clk(clk), .rst(rst), .Clear_Flag(Clear_Flag_Input), .Default_Value(`Regs_Data_Rst), 
    .Write_Input(Write_Reg_Data_Input), .Read_Output(Write_Reg_Data_Output));
    

    assign Write_Reg_Flag_Forward_Output = Write_Reg_Flag_Input;
    assign Write_Reg_Addr_Forward_Output = Write_Reg_Addr_Input;
    assign Write_Reg_Data_Forward_Output = Write_Reg_Data_Input;

    always @(posedge clk) begin
        $display($time,"=================  MEM_WB:  Write_Flag:%d,  Wirte_addr:%d,  Write_Data:%d  ",Write_Reg_Flag_Forward_Output,Write_Reg_Addr_Forward_Output,$signed(Write_Reg_Data_Forward_Output));
    end


endmodule
